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Senior Hardware Design Engineer

AragoParis OfficesFull-timeSalary not listed · Typical payPosted Nov 3, 2026

Arago is hiring for the position of Senior Hardware Design Engineer in Paris Offices. It is listed as a full-time, senior position.

Written by Dev Global Jobs

DGJ summary of this job

Our own short read of this listing, built only from the facts it gives. The employer’s original text follows further down.

Arago is hiring for the position of Senior Hardware Design Engineer in Paris Offices. It is listed as a full-time, senior position.

Reading the advert, the employer asks for English language skills.

The employer does not state a salary in this listing; the DGJ Country Salary Calculator gives official average pay figures by country.

Benefits mentioned in the advert: pension or retirement plan, paid time off, equity or stock options, bonus and learning budget.

Dev Global Jobs found this job on Arbeitnow on Nov 3, 2026.

Employer
Arago
Location
Paris Offices
Job type
Full-time
Level (from the title)
senior
Pay
Not stated by the employer
Languages asked
English
Found
Nov 3, 2026 on Arbeitnow
Employer text
497 words, about 2 min to read
Before you apply
  • Apply only on the official page (arbeitnow.fr). Dev Global Jobs is not the employer and never asks for a fee.
  • Say your level in English plainly (for example B2 or C1).
  • Read the employer’s full text below (about 2 min) before you apply.
  • Build or check your CV with the free DGJ CV Builder.
Job description

About the role

Full text from the employer, as published on Arbeitnow, arranged into sections. Nothing added or removed.

01Meet Arago and the Aragonians

Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors.

Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs.

Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles:

  1. Do great things: we deliver work we’re proud to sign our name to.

  2. High velocity: speed matters. We move quickly, one step at a time.

  3. One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie.

Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders.

 

02What you’ll do

Design and verify custom digital hardware components and architectures that enable high-performance, tightly integrated computation workloads and interface Arago’s custom tensor unit for advanced AI/ML applications.

 

03Responsibilities

  • Design, implement, and verify RTL blocks for memory, control, and compute subsystems within Arago’s custom multiphysics computation unit.

  • Collaborate with Arago’s system software and architecture teams to define block-level specifications and ensure alignment with performance and integration goals.

  • Develop and maintain functional verification infrastructure to validate design correctness across simulation and hardware testbenches.

  • Support synthesis, timing analysis, and backend integration, working closely with Arago’s physical design and CAD engineers.

  • Contribute to architectural exploration and hardware-software co-design efforts to shape future iterations of Arago’s compute platform.

 

04Required Skills and Experience

  • Extensive experience in RTL design (Verilog/SystemVerilog) for control logic, datapaths, memory subsystems, and specialized processing units.

  • Strong understanding of digital architecture, including pipelining, arbitration, memory hierarchy, and system-level integration.

  • Proficiency in functional verification, including testbench development, assertions, coverage metrics, and debugging (UVM experience is a plus).

  • Familiarity with ASIC and FPGA design flows, including synthesis, timing closure, and DFT.

  • Comfortable working across the full hardware stack, from architectural specification and microarchitecture to physical implementation support.

  • Language: English at a proficient level. French is a plus.

 

05Pay and benefits

  • Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions.

  • Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers).

  • Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location.

  • Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays.

  • Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive.

  • Reimbursement of 50% of the public transport subscription fee.

  • A high-paced, multicultural (with 9 nationalities), and engineering-led environment.

Find more English Speaking Jobs in France on Arbeitnow

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